1. 设计顶层测试文件时报错误！
Started : "Behavioral Check Syntax".
Determining files marked for global include in the design...
Running vlogcomp...
Command Line: vlogcomp -work isim_temp -intstyle ise -prj {E:/FPGA Projects/Test1/TestFig_stx_beh.prj}
Determining compilation order of HDL files
Analyzing Verilog file "E:/FPGA Projects/Test1/Source/Module1.v" into library isim_temp
ERROR:HDLCompiler:806 - "E:/FPGA Projects/Test1/Source/Module1.v" Line 1: Syntax error near " ".